1. Field of the Invention
This invention relates to graphics and imaging on digital computer systems.
2. Related Art
The invention of high speed/high resolution bit mapped display monitors has made possible many advances in the fields of imaging and graphics. In addition, the invention of video RAM (Random Access Memory) has simplified the storage and display of imaging and graphics data. For example, modern image/frame memories, (i.e. the memory used to refresh the image on the display monitor), are often designed so as to utilize the video RAM's serial output registers. For the purposes of this specification these image/frame memories may alternately be referred to as "frame memories" or "framestores".
Despite the advances which both of these inventions have spawned there are still many areas in the imaging and graphics field which are in need of improvement. One of these areas is the interface between data coming out of the video RAMs serial output and the high speed/high resolution bit mapped display monitor. The general problem in this area relates to speed. While modern day high resolution bit mapped devices can often accept and display data at clock rates of 125 MHZ and higher, modern video RAMs can only provide data at a clock rate of about 25 MHZ.
In order to deal with this disparity in clock rates, many imaging and graphics computer systems access, (from frame memory), image data representing more than one pixel at a time in order to refresh the display monitor. This package of accessed data will be referred to as a "pixel group" for purposes of this specification. Systems which utilize "pixel group" accessed data to refresh the display monitor will be referred to as "pixel group access systems". For example, if eight bits of data are used to represent every pixel, and the complete data representing each pixel can be clocked out of memory at 25 MHZ, then 5 pixels worth of information (40 bits) will have to be clocked out of memory in each access cycle in order to keep up with the display monitor. For a second example, if each pixel is only defined by one bit of information, (e.g. in a monochrome display), then pixel data need only be clocked out of memory 5 bits at a time in order to keep of with the display monitor.
From the foregoing examples it may be understood that as the number of bits used to define each pixel increases, (for example, 4 bits per pixel will allow 16 colors to be defined), the number of bits which must be clocked out of RAM in each access cycle increases proportionally. Given that the video RAMS must supply data to the display monitor at the monitors clock rate (i.e. video rate), the computer designer is then faced with the problem of processing the data to be displayed at a rate which will not be perceptible to a person viewing the display screen.
For example, assume that an image is to magnified, (i.e. zoomed), at a 2 to 1 ratio. Each pixel used to make up the original image must be duplicated in both the horizontal and vertical directions, and unwanted data must somehow be "pushed" out of the displayed picture.
A common way of accomplishing this is through the use of software. A program may simply read the stored image and duplicate each piece of image data, as required, in the framestore. In the meantime, data must still be supplied to the display device. The result of the operation is that the viewer will perceive some "zoomed" image portions on the monitor concurrently with "not yet zoomed" portions of the image. Eventually the entire image will appear magnified, (zoomed), but in the interim, an unfinished, intermediate image will be perceived.
In low resolution devices, where video pixel data may be accessed one piece at a time, this problem may be solved by merely holding the same pixel data at the display monitors digital to analog converter (DAC) for two clock cycles and repeating the complete data for two successive line scans on the display monitor. This technique is only possible, however, because in older, low resolution systems, data representing only one pixel need be accessed at a time due to the slow speed of the display monitor.
From the foregoing discussion, it may be seen that the low resolution solution to the magnification problem will not successfully create a zoomed image in pixel group access systems. In systems which access pixels in groups to refresh the display monitor, holding the same pixel data at the input DAC of the display monitor would merely produce a repetitive pattern of pixel groups which are not representative of the image. By way of illustration, assume an image is made up of 10 pixels--A,B,C,D,E,F,G,H,I, and J. The first line of a 2:1 magnified image should appear as A,A,B,B,C,C,D,D,E,E,F,F,G,G,H,H,I,I,J,J. In a modern system, (which in this example accesses data representing five pixels at a time), the first pixel group accessed from memory will contain the information for pixels A,B,C,D and E. If the accessed data is held at the input of the display monitors DAC for two clock cycles the image on the monitor will appear as--A,B,C,D,E,A,B,C,D,E. Similarly, data acquired on the second pixel group access would appear as F,G,H,I,J,F,G,H,I,J. It should be easily observed that this is not the desired result.
Performing the magnification or zoom, function at a speed which makes the processing imperceptible to a viewer is not the only problem encountered in modern imaging and graphics systems. Window manipulation, at imperceptible speeds, and within pixel group boundaries can also be a formidable task.
One way of opening a window on a display monitor is through software manipulation of the frame data. The formation and/or manipulation of the window may be accomplished by first storing the windowed image data in a second memory (which is relatively slow) and then transferring the new, processed image to the frame memory. Software window manipulation may also be accomplished by dynamically altering the contents of the frame memory (which will often create viewer perceptible artifacts on the display monitor).
One problem with some software solutions is that the processing operation often destroys the originally stored image data. Further, pixel group accessing of data makes it impracticable for many imaging and graphics systems to open a window that starts and/or ends within the boundaries of an individual pixel group (i.e. part of the pixel group contains window data and part does not).
The use of video RAMs makes even hardware solutions to windowing problems difficult to achieve. The serial shift register inside the video RAM holds data for one line of the display monitor. This data is held serially and is perpetually being clocked out as the monitor is refreshed. In order to create a window, many systems need to dynamically readdress the video RAM and cause new data to be transferred into the serial shift register. The fact that data is perpetually being transferred from the video RAMs to the monitor's video DAC makes it difficult or impossible to perform this transfer without creating artifacts, (noise), on the display monitor. An example of a hardware window apparatus that is suited to systems which do not use video RAMs or pixel group accesses may be seen in U.S. Pat. No. 4,642,621 to Nemoto et al. which, in its entirety, is incorporated by reference herein as if printed in full below.
Operations such as panning also require processing time which may often be viewer perceptible. Further, the mere fact that pixel data has been accessed as a pixel group, from a video RAM, makes the panning processing a more complicated matter than it would otherwise be. Pixel group accessing may also make any manipulation of individual pixel data difficult. For example, moving an image within pixel group boundaries may pose a complex problem for pixel group access systems.
It would be desirable to be able to process pixel group accessed data so as to perform functions such as pan, zoom and window manipulation at a high enough rate so that such processing is imperceptible to a viewer. It would also be desirable to be able to perform these functions without destroying the integrity of the image data held in the framestores. It would be desirable to be able to perform merge and manipulate operations on pixel group accessed data at viewer-imperceptible speeds. It would also be desirable to perform such functions on pixel group accessed data at the granularity of a single pixel. Further, it would be desirable to be able to perform such functions, at video rate, on the data from more than one framestore.